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News Release from: Altium | Subject: 32-bit FPGA-based RISC processor
Edited by the Manufacturingtalk Editorial
Team on 12 November 2004
Easy-to-use FPGA-based RISC processor
Altium's Service Pack 2 for Nexar, the company's FPGA-based system design software, will include a new 32-bit FPGA-based RISC processor.
Altium's Service Pack 2 for Nexar, the company's revolutionary FPGA-based system design software, will include a new 32-bit FPGA-based RISC processor that will greatly simplify the development of 32-bit systems targeted for FPGA implementation and take the risk out of migrating systems to the 32-bit domain The processor has been specifically designed to minimize the complications and complexity usually associated with 32-bit system design
This article was originally published on Manufacturingtalk on 2 Apr 2007 at 8.00am (UK)
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Dubbed the TSK3000, the RISC processor is internally based on the Harvard architecture, but features a simple memory structure and hardware-based vectored interrupt handling to make coding simpler.
Interfacing to the processor is also simplified by the provision of separate bus interfaces for connecting memories and peripherals.
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The TSK3000 uses the open-standard Wishbone "System-On-Chip Interconnect" bus to allow system designs to be used on any target FPGA families with no licensing issues.
A large selection of Wishbone peripherals is supplied with the Nexar design system.
As with all Nexar processors and FPGA-based components, the TSK3000 is supplied pre-synthesized for a wide variety of target devices.
This means the device can be easily incorporated into a system design at the block level, eliminating the need to manually instantiate the core in HDL and greatly simplifying the core's use in FPGA-based systems.
It also enables the core to be used with any FPGA device of suitable capacity supported by the Nexar design system, giving engineers a completely device and FPGA vendor-independent 32-bit system hardware platform.
Service Pack 2 for Nexar will also see the addition of full embedded software development support for the TSK3000, with a highly-optimizing C compiler based on Altium's TASKING Viper compiler framework, as well as a fully-integrated assembler, profiler and source-level debugger.
"The primary design goal for the TSK3000 was to bring the power of 32-bit RISC processors to FPGA-based system design, while keeping the ease of use and simplicity of traditional board-level 8-bit system design," said Nick Martin, founder and Joint CEO of Altium.
"By integrating our Viper embedded software development tools for the TSK3000 with Nexar's hardware design capabilities, we've made true FPGA co-design not only possible, but easy to do." Altium's Nexar design software allows the interactive development of complete systems, including processor-based designs, on an FPGA platform.
The Nexar design methodology - LiveDesign - enables real-time communication with active devices in the circuit, such as FPGA-based processors and virtual instruments, that are running inside the target FPGA.
Nexar integrates with Altium's NanoBoard, a versatile FPGA development board that features swappable target devices and acts as a nano-level breadboard to allow interactive, 'live' development and debugging of systems without the need for simulation at the system level.
This can significantly shorten system development time.
The device-independent nature of the TSK3000 and the recent release of a number of new high-end daughter boards for the NanoBoard means system designers can use Nexar to take full advantage of the latest developments in FPGA device technology to deploy high-performance 32-bit systems running within a programmable device.
"This release marks a major milestone for the Nexar system," said Nick Martin, founder and Joint CEO of Altium.
"Engineers can now apply our LiveDesign methodology to the development of sophisticated 32-bit systems implemented inside a programmable platform, with significant benefits to design time and ease of system development and implementation." Key features of the TSK3000 core include: " 5-stage pipelined RISC processor " 32x32 to 64-bit hardware multiplier, signed and unsigned " 32/32-bit hardware divider, signed and unsigned, with 32-bit quotient and remainder " 32-bit single-cycle barrel shifter " 32 interrupts including 8 priority vectored interrupts " Internal Harvard architecture with simplified external memory access " 4GByte address space " Wishbone I/O and memory ports for simplified peripheral connection " Works with large set of supplied Wishbone peripherals " Full Nexar Viper-based software development toolchain - C compiler/assembler/source-level debugger/profiler " C code compatible with Nexar TSK51 and TSK80 8-bit processors for easy design migration " Hardware interface compatible with Nexar TSK52 and TSK80 8-bit Wishbone processors " FPGA device-independent implementation " JT-based on-chip debug facilities compatible with Altium's LiveDesign development environment Pricing and availability The TSK3000 processor will be available from December 1, 2004 with the release of Service Pack 2, and will be included in new Nexar licences at no extra cost.
Nexar is priced at 7,995 Euro for a new licence.
A Unified Nexar-Protel 2004 software license is also available, providing complete FPGA-PCB systems development, and is priced at 9,995 Euro.
Protel 2004 users can upgrade their existing license to this system from 2,995 Euro.
Altium's NanoBoard is priced at 995 Euro and is currently delivered with two daughter boards included - the Xilinx Spartan-IIE 300 and the Altera Cyclone 12.
A wide range of additional daughter boards are also available.
For developers wanting to evaluate Nexar, LiveDesign Evaluation Kits are now available and prices start from 49 Euro.
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