http://www.manufacturingtalk.com/news/apx/apx000.html Aldec news releases on Manufacturingtalk en-gb Copyright (C)2008 Pro-Talk Ltd. All rights reserved. Wed, 27 Aug 2008 08:00:00 UT Wed, 27 Aug 2008 08:00:00 UT http://www.pro-talk.com/images/protalklogo90.gif http://www.pro-talk.com/ 90 79 Active-HDL coupled with The MathWorks Simulink provides support for fixed-point types and HDL co-simulation of black-boxes, which allows seamless integration with Simulink-based DSP tools Fri, 13 Apr 2007 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx113.html Support for Altera's Cyclone III devices in the latest release of Aldec simulators provides customers with access to the latest low-cost and low-power devices being offered by Altera Thu, 22 Mar 2007 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx112.html Aldec has announced System Verification Environment (SVE) support for Altera's new high-end Stratix III FPGA device family. Mon, 13 Nov 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx111.html Average performance gain of 57% on RTL and 250% on gate level and timing simulations Thu, 19 Oct 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx110.html Aldec has announced support for the Open IP Encryption Initiative design flow in the latest version of Aldec's Riviera tool. Fri, 11 Aug 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx108.html Aldec, a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, has announced the addition of Expression Coverage for Verilog in the release of Rivieratm 2006.06. Fri, 11 Aug 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx109.html Aldec, a pioneer in mixed-language simulation, hardware accelerators and prototyping tools has been awarded a new patent for automatic conversion of ASIC designs into FPGA devices. Thu, 25 May 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx107.html Aldec, a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, has released Server Farm Manager (SFM). Wed, 19 Apr 2006 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx106.html Aldec, a pioneer in mixed-language simulation and advanced design tools for FPGA and ASIC devices, has released Riviera-SNA (Simulator for Networking Applications). Wed, 03 Aug 2005 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx105.html Aldec has announced the release of Riviera 2005.04 with an all new system-level simulation engine and improved SystemC debugging. Tue, 19 Apr 2005 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx104.html Aldec, a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, has released Riviera-IPT with all-new support for the ARM926 hardcore processor. Tue, 08 Mar 2005 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx103.html Aldec has released Riviera 2004.12 that includes additional SystemC debugging features, enhanced OVA/PSL/SVA assertion-based verification (ABV), and operating system-independent design libraries. Thu, 30 Dec 2004 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx102.html Aldec, together with Magma Design Automation, has announced the completion and immediate availability of the design flow interface between Active-HDL 6.3 and PALACE version 2.4. Wed, 24 Nov 2004 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx101.html Riviera-IPT provides a seamless, high-speed co-verification and debug environment for complex embedded software/hardware co-development utilizing the Arm processors. Fri, 18 Jun 2004 08:00:00 UT Aldec http://www.manufacturingtalk.com/news/apx/apx100.html