Standby Power Reduced to Under 120uA

Lattice Reduces Standby Current for LatticeXP FPGA Family by a Factor of 1000

Lattice Semiconductor Corporation has announced the addition of a new power-saving feature that reduces standby power by over a factor of 1000 for its LatticeXP family of non-volatile FPGAs.

Sleep mode utilizes the LatticeXP device's unique Flash and SRAM architecture to provide an ultra low standby state that can be entered in nanoseconds and exited in less than 2mS.

While in Sleep mode, the LatticeXP device draws as little as 120uA of total power supply current.

"The need for reduced power consumption has been largely unmet by mainstream FPGAs," said Stan Kopec, Lattice vice president of corporate marketing.

"The new Sleep mode, now available in our LatticeXP FPGAs, allows our customers to achieve the low power operation they require while still enjoying the design flexibility of a mainstream FPGA." To reduce power consumption, a wide variety of integrated circuit manufacturers have added sleep, or standby, modes to their devices.

Lattice now leads the FPGA industry by incorporating, for the first time, this approach into a mainstream, LUT-based FPGA.

A single pin called SLEEPN controls entry into and exit from Sleep mode.

When this pin is held high, the device operates normally.

When driven low, the device moves into Sleep mode in less than 100nS.

In Sleep mode, the total device standby current is as little as 120uA.

When SLEEPN is driven high again, the device configuration is automatically restored from the on-chip Flash block and resumes normal operation after a maximum delay of 2mS.

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