Improved performance for Lattice FPGAs

Expansion of OEM and development agreement designed to produce superior results

Lattice Semiconductor Corporation, a leading supplier of in-system programmable logic devices, and Synplicity, a leading supplier of software for the design and verification of semiconductors, has announced that the 8.4 version of Synplicity's Synplify Pro product will provide additional performance enhancing features for Lattice Semiconductor's FPGA devices.

Designers utilizing the Synplify Pro 8.4 software along with Lattice Semiconductor's FPGAs can expect to achieve up to a 20 percent performance improvement and significant area savings compared to competitive solutions.

These improvements are the result of an ongoing strategic relationship between Lattice and Synplicity that ensures their mutual customers are provided with the best performance and time-to-market benefits.

"Our long-standing and close working relationship with Lattice Semiconductor allows us to provide best-in-class support for all of Lattice's newest FPGA device families," said Jeff Garrison, director of FPGA products at Synplicity.

"Our 8.4 release of Synplify Pro software adds many new performance-enhancing features like pipelining, re-timing, automatic RAM inferencing and inferring sequential shift operations in the RTL for implementation in RAM that result in substantial performance improvements for Lattice FPGAs." "Performance improvement translates into more effective timing closure and lower cost solutions for our FPGA customers," said Tim Schnettler, director of Design Tools Marketing at Lattice Semiconductor.

"Synplicity is an industry leading provider of FPGA software and we believe our strengthened partnership will be a source of continual innovation and improvement for years to come." Over the next two quarters, Lattice Semiconductor and Synplicity plan to hold a seminar series detailing the performance benefits that can be achieved by using Synplicity's synthesis products with Lattice Semiconductor's FPGAs and CPLDs.

The seminar series will include a technical discussion about the newest generation of Lattice FPGAs and ispLEVER design tools, and techniques for using Synplicity's Synplify Pro software to boost design performance.

The seminar series will be held in cities throughout the United States through the rest of this year, and in multiple cities in Europe and Asia in early 2006.

For more information about the seminar series, including seminar locations and dates, visit our website.

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