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CAD solid modelling software
News Release from: Lattice 3D | Subject: IspLEVER 4.1
Edited by the Manufacturingtalk Editorial
Team on 22 July 2004
Lattice Announces IspLEVER 4.1 Design
Environment
Lattice Announces IspLEVER 4.1 Design Environment For New LatticeECP-DSP And LatticeEC FPGAs
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its ispLEVER version 4.1 design tool suite, which includes design support for the recently introduced LatticeECP-DSP and LatticeEC FPGA device families The Lattice ispLEVER software suite is a well-established and broadly installed programmable logic design tool platform, supporting all Lattice programmable logic devices
This article was originally published on Manufacturingtalk on 23 Sep 2004 at 8.00am (UK)
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The ispLEVER solution includes all the tools needed to move a programmable logic design from concept through implementation.
This complete software suite includes tools for efficient design entry, project management, design fitting, place and route, floorplanning, device programming, on-chip logic analysis and more.
The ispLEVER design tools also include third party solutions for HDL synthesis and simulation from Synplicity and Mentor Graphics, assuring users of superior synthesis and simulation results.
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New ispLEVER 4.1 enhancements provide users a simple and straightforward upgrade path to designing with the new Lattice FPGA families, while retaining the familiar and easy-to-use ispLEVER interface.
This new software release also improves the design libraries and fitting engines for all Lattice programmable logic families, and adds support for the new ispXPGA-E low-cost FPGAs and ispGDX2-E programmable crosspoint switches.
The ispLEVER 4.1 release also includes new versions of third party synthesis and simulation tools from Synplicity and Mentor Graphics and, for the first time, supports the Linux OS.
"Our new ispLEVER 4.1 design tools will unlock the unique capabilities of our LatticeECP-DSP and LatticeEC FPGA technologies," said Stan Kopec, Lattice vice president of corporate marketing.
"With ispLEVER 4.1, designers can quickly implement their FPGA designs on these exciting new product families that have been optimized for both economy and exceptional performance, while taking advantage of industry-leading features that include dedicated high performance DSP blocks, DDR interfaces and low-cost memory configuration options " Lattice vice president of software Chris Fanning said, "ispLEVER 4.1 delivers enhanced capability, performance, and ease-of-use to our customers.
Our continued consultations with experienced FPGA designers provide invaluable input to our development process and help us deliver a first-class FPGA design environment." In anticipation of the growing demand for Linux-based design solutions, ispLEVER 4.1 will be available on the Red Hat Enterprise Linux version 3 operating system.
The ispLEVER 4.1 design tools also include DSP blocks for use in the MATLAB/Simulink DSP design environment, available separately from The Mathworks.
These DSP blocks can be used to build DSP solutions, within the MATLAB/Simulink environment, that can then be exported in HDL optimized for the LatticeECP-DSP FPGA architecture.
Availability and pricing.
The ispLEVER 4.1 design tools are available now in a variety of PC-, UNIX- and Linux-based configurations.
List prices begin at $995.
All registered users of Lattice software with a valid maintenance agreement will receive the 4.1 upgrade at no charge within the next thirty days.
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