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Lucent Selects Lattice System Chips

Edited by the Manufacturingtalk editorial team Sep 2, 2004

Lucent Selects Lattice System Chips For Next Generation Multiservice Edge Switch

Lattice Semiconductor Corporation (NASDAQ: LSCC) has announced that Lucent Technologies has selected its ORSO82G5 and ORSO42G5 field programmable system chips (FPSC), as well as the ispGDX2 generic digital crosspoint switch, for use in Lucent's next generation CBX 3500 Multiservice Edge Switch.

The CBX 3500 switch has been specifically created to allow service providers to offer more profitable Frame Relay, Asynchronous Transfer Mode (ATM) and private line services, and to have the ability to deploy new Ethernet and IP/MPLS services.

The Lattice devices are used within the system interconnect scheme for board-to-board communications.

The signal integrity characteristics and the embedded SONET digital logic in the 2.7 Gbits/s SERDES devices allow Lucent to drive high bandwidth signals over long distances throughout the entire system.

Additionally, the highly integrated ORSO system chips provided native SONET capability without the need for additional soft cores or external PLLs.

"The Lattice FPSCs pioneered the approach of putting ASIC embedded cores and FPGA gates on the same silicon die," said Stan Kopec, Lattice vice president of corporate marketing.

"In contrast to ASICs with embedded FPGA gates, FPSCs have a broad range of uses.

The embedded cores hold industry-standard intellectual property, including bus interface, high-speed line interface and high-speed transceiver cores.

When these embedded cores are combined with programmable gates, they can be used by customers in a variety of advanced system designs, such as Lucent's CBX 3500 multiservice edge switch." About the ORS082G5/ORS042G5 Field Programmable System Chips Intended for high-speed serial SONET backplane data transmission, the ORSO82G5 includes eight backplane transceiver channels, each operating at up to a 2.7 Gbits/s data rate, providing a full-duplex synchronous interface with built-in Clock/Data Recovery (CDR) and more than 400k usable FPGA system gates.

The ORSO42G5 includes four backplane transceiver channels, each operating at up to a 2.7 Gbits/s data rate, along with more than 10K LUTs of FPGA logic.

Both devices provide a full 10 Gbits/s backplane data connection with protection between a line card/redundant line card and switch fabric/redundant switch fabric.

The FPGA portion can be used to implement a 2.5Gbit/s or 10Gbit/s SONET-based switch fabric interface.

Both the ORSO82G5 and ORSO42G5 provide a SERDES-based high-speed interface for inter-device communication on a board or across a backplane.

The devices also support SONET data scrambling and descrambling, streamlined SONET framing, transport overhead handling, cell insertion and extraction, and idle cell insertion/deletion, plus programmable logic to terminate the network into proprietary systems.

All SONET functionality is hidden from the user and no prior networking knowledge is required.