Product category:
Calibration and Testing Services, Consultancy and Learning
News Release from: SGS | Subject: Semiconductor device failure analysis and testing
Edited by the Manufacturingtalk Editorial
Team on 23 January 2007
Semiconductor device failure analysis
and testing
Development in the semiconductor industry has always been characterised by shrinking to smaller structures.
Development in the semiconductor industry has always been characterised by shrinking to smaller structures Ultra shallow dopants and ultra thin gate oxides using new materials accompany the shrinking process
This article was originally published on Manufacturingtalk on 28 Jun 2007 at 8.00am (UK)
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Furthermore, the Back End of Line (BEOL) is characterised by an increasing number of metallisation levels as well as the use of advanced materials and complicated geometries.
At the same time there is an increasing demand in the semiconductor industry for quality and reliability.
These demands and the technical developments create new needs for metrology, analytical service and also for quality control and failure analysis.
Analytical service labs have to rise up to these new needs.
Besides its wide service portfolio, SGS Institut Fresenius focuses on some special techniques in order to correspond with developments in the semiconductor industry.
The characterisation of ultra shallow doped areas is usually done by low energy Secondary Ion Mass Spectrometry (SIMS) and the very powerful technique of Spreading Resistance Profiling (SRP) is used for the measurement of electrically active ultra shallow dopant profiles.
The development of extremely small feature sizes and the need to obtain data on ultra thin layers and very small material volumes require the use of techniques such as Transmission Electron Microscopy (TEM) including its time-consuming sample preparation which can be done with the help of a Focused Ion Beam (FIB).
X-ray Photo Electron Spectroscopy (XPS) is used for the analysis of layer stacks in the range of only a few nm.XPS allows depth profiling of thin layers, both by ion sputtering or by angle resolved photoemission spectroscopy (ARPES).
Semiconductor device failure analysis implies the localisation and identification of design weaknesses and deviations from the designed chip construction that could lead to an abnormal electrical behaviour or other quality and reliability problems.
Physical failure analysis is based on microscopic imaging and material analytical techniques.
The main tool for process control and visualisation of failures is still Scanning Electron Microscopy (SEM).
The use of FIB is becoming increasingly important in failure analyses and is also suited for modifying integrated circuits. Request a free brochure from SGS ...
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